In recent years, high densification and miniaturization of electronic devices is progressing, LSI chips are being reduced in size to the same extent as semiconductor packages, and the high densification due to two-dimensional arrangement of chips within a package continues to reach its limit. Thus, it is necessary to separate and stack LSI chips in three-dimensions in order to increase the mounting density of chips within a package. In addition, it is necessary to bring the distance between stacked circuits closer together in order to operate the entire semiconductor package stacked with LSI chips at high speed.
Therefore, in order to respond to the demands described above, a through electrode substrate has been proposed arranged with a conductive part (through hole) which conducts the front surface and rear surface of a substrate as an interposer between LSI chips. Such a through electrode substrate is formed with a through electrode by filling a conductive material (Cu etc.) into a through hole by electrolytic plating and the like.
However, in a conventional through electrode substrate, a blow-off phenomenon of a wiring layer in an annealing process during manufacturing and a phenomenon in which boosts, peelings or cracks occur in an insulation layer and the like within a through hole have been confirmed. The cause of these phenomena is due to the expansion of a gas component or water component included in a conductive material during a heat treatment.